Now P1 is again triggered to fabricate four positive half cycles of load voltage and so on. In this manner, four negative half cycles of load voltage and load current, equal to number of positive half cycles of load voltage & current, are generated. Now when N1 is gated at (5π+α), i o again builds up but it decays to zero before thyristor N2 in sequence is again gated.
After N2 is triggered, O is positive with respect to “a” but before N1 is fired, i o decays to zero and N2 is naturally commutated. As N2 is forward biased, it starts conducting but the direction of load current is reverse this time i.e. Load current in figure-2 is seen to be discontinuous.Īfter four positive half cycles of load voltage and load current, thyristor N2 is gated at (4π+α) when O is positive with respect to b. At ωt = (π+ β), i o decays to zero and P2 is naturally commutated. Load current is again positive from A to O and builds up from zero as shown in figure-2. Now forward biased thyristor P2 is fired at ωt = (π+α). The thyristor P1 is thus, naturally commutated at ωt = β which is already reversed biased after π.Īfter half a cycle, b is positive with respect to O. Load current i o becomes zero at ωt = β>π but less than (π+α). With this, load current i o starts building up in the positive direction from A to O.
The forward biased SCR P1 is triggered at ωt = 0. For positive cycle of input AC supply, the terminal A is positive with respect to point O.
0 kommentar(er)
